The MRF101 amplifier is based on the NXP MRF101 RF Power LDMOS Transistors. Although I use the amplifier extensively on 30m through 15m bands, it is still a work in progress. Heating of the T2 and T3 cores is occurring on 160m and 80m, and there is instability on 12m and 10m bands. For the next build iteration, I intend to replace the output matching network, including T2 and T3.
The MRF101 amplifier schematic is shown below, and is based on Fig. 2.101 in Experimental Methods in RF Design by Hayward, Campbell, & Larkin. The MRF101 is available in an A and B version with mirrored pinouts to simplify PCB layout in push-pull configurations.
This amplifier requires Low Pass Filters at its output to meet FCC requirements. Low Pass Filters from W6PQL housed in a separate enclosure are used with this amplifier. I decided to mount the Low Pass Filters in a separate HP436a chassis for space reasons and to allow them to be used for other amplifier projects.
The -3dB Pad at the input provides a stable 50 ohm load for the driving transmitter. Approximately 0.5W is required to drive the amplifier to 150W output (~25dB gain). Transformer T1 transforms the unbalanced 50 ohm input to two outputs 180 degrees out of phase to drive each of the MRF101s.
The drains of Q1 and Q2 connect to two out of phase windings on T2, and to the primary of the output transformer T3.
T2 is a transmission line transformer alternately interfacing the unbalanced or single ended outputs of Q1 and Q2 to the balanced primary winding of the final transformer T3. In doing so, T2 provides a 1:4 impedance transformation ratio between the single ended outputs of Q1 and Q2, and the primary of T3.
With a 50 ohm load transformed 1:4 by T3 and 1:4 by T2, the load resistance seen by Q1 and Q2 during their half cycles is ~3 ohms.
Initially I used a single binocular core at T2, however, the single core was getting very hot so I have now stacked two cores to reduce the core temperature as shown in the picture below.
T2 does not function as an RF choke and so does not block RF pulses from the DC supply. Therefore bypass capacitors C8 – C12 and C15 – C18 must be rated sufficiently to handle the high RF currents present on the 50V DC power rail. During early testing of the amplifier, an under rated bypass capacitor disintegrated as shown in the photo below.
The DC input power for the amplifier is typically 350W to produce 150W output power, yielding an efficiency of ~43%.
R7 and R8 are used to set the quiescent current for Q1 and Q2 to 100mA each in accordance with the recommendation in the MRF101 data sheet. With 100mA quiescent current, individual MRF101 are reasonably linear up to 100W output power.
The amplifier PCB and heatsink were mounted in the top of an HP436a Power Meter chassis. An Arduino Mega mounted vertically immediately behind the front panel LCDs provides control and display functions.
© 2014 – 2021 Rod Gatehouse AD5GH