The MRF101 amplifier is based on the NXP MRF101 RF Power LDMOS Transistors. The objective is to provide 150W across the HF amateur bands. With the 2020 Transceiver driving the amplifier, the following results have so far been obtained.
The MRF101 amplifier schematic is shown below and is based on Fig. 2.101 in Experimental Methods in RF Design by Hayward, Campbell, & Larkin. The MRF101 is available in an A and B version with mirrored pin outs to simplify PCB layout in push-pull configurations.
This amplifier requires Low Pass Filters at its output to meet FCC requirements. Low Pass Filters from W6PQL housed in a separate enclosure are used with this amplifier. I decided to mount the Low Pass Filters in a separate HP436A chassis for space reasons and to allow them to be used for other amplifier projects.
I use this amplifier exclusively with FT4/8 which are essentially single tone modes. I have checked 2-tone IMD on a RIGOL DSA815 and it looks reasonable.
If you would like to experiment with this design, Gerber files for the PCB are available on GitHub. I welcome feedback from anyone who builds the amplifier. I will continue to experiment with the ferrite cores at T2 and T3 to improve the frequency response on 160 and 80M.
The -3dB Pad at the input provides a stable 50 ohm load for the driving transmitter and provides some measure of overdrive protection from a 10 watt transmitter. Failures that occurred during testing this amplifier were due to overdriving the MRF101 LDMOS devices. With the -3dB pad, 2 – 4W is required to drive the amplifier to nominal 150W output (~18dB gain).
Transformer T1 transforms the unbalanced 50 ohm input to two outputs 180 degrees out of phase to drive each of the MRF101s. T1 consists of a 2 turn primary winding (#22 AWG) and a single bifilar turn (#24 AWG) for the secondary on a BN-43-202 binocular core. R4 – R7 provide a 50 ohm load across the secondary of T1.
One of the objectives with this build was to improve the output matching to eliminate the ferrite core heating and improve the amplifier efficiency. This process started with determining the output resistance each MRF101 would “like to see” based on the classic equation (Eq. 2.42 in Experimental Methods in RF Design by Hayward, Campbell, & Larkin):
Rload = Vdd^2 / 2xPout, or in this case
Rload = 50V^2 / 2x100W = 2,500 / 200 = 12.5 ohms.
Therefore, a 1:4 impedance transformation is required in order for a 50 ohm load to provide this optimum 12.5 ohm load for each of the MRF101 devices.
T2 is a 1:4 transmission line transformer that alternately (each half RF cycle) interfaces the unbalanced or single ended outputs of Q1 and Q2 to the balanced primary winding of the final transformer T3.
T3 is a 1:1 balun that converts the balanced 50 ohm output of the push-pull amplifier to unbalanced 50 ohm interface at the output.
T2 and T3 are each wound with RG316 50 ohm coaxial cable on two Laird LFB250150-000 ferrite cores stacked together using fiberglass tape as shown below.
The optimum transmission line impedance for a Transmission Line Transformer (TLT) is given by the following equation:
Zopt = SQRT(Zin x Zout)
Therefore, for T2 the optimum transmission line impedance is: SQRT(12.5 x 50) = 25 ohms
For T3: SQRT(50 x 50) = 50 ohms
The 25 ohm transmission line impedance for T2 was realized by using parallel windings of RG316 50 ohm coaxial cable. T2 consists of five parallel turns of RG316 on two stacked Laird ferrite cores.
T3 consists of 5 turns of RG316 coax on two stacked Laird ferrite cores.
T2 does not function as an RF choke and so does not block RF pulses from the DC supply. Therefore bypass capacitors C9, C10, C15, C1, C17, & C18 must be rated sufficiently to handle the high RF currents present on the 50V DC power rail.
An RF Choke, L3, was added in this build to improve filtering of the DC supply – to keep RF out of the 50V DC switching power supply, and keep any noise present on the 50V switching power supply output from affecting the amplifier.
In this build, with the exception of T1, the gate and bias circuitry was moved to the backside of the PCB as shown below.
The DC input power for the amplifier is typically 250W to produce 150W output power, yielding an efficiency of ~60%. T2 and T3 ferrite cores now only become slightly warm to touch.
During operation, pin 1 of J5, BIAS CNTL, is grounded to apply bias to the MRF101s.
I recommend building and testing the amplifier bias circuitry first (prior to installing Q1 & Q2) to verify it is functioning properly, and then adjusting RV1 and RV2 to set the bias voltages to something less than 2 volts to ensure Q1 and Q2 are cutoff the first time 50V DC is applied to the amplifier with Q1 & Q2 installed.
With construction complete, the quiescent current for the MRF101s must be properly set. The amplifier input and output should be terminated with 50 loads, with no input drive. With 12V and 50V DC power applied, ground pin 1 on J5 and carefully adjust RV1 and RV2 in turn to set the 50V DC quiescent current for Q1 and Q2 to 100mA each, or a total of 200mA current draw on the 50V DC supply.
In accordance with the recommendation in the MRF101 data sheet, with 100mA quiescent current, individual MRF101 are reasonably linear up to 100W output power.
The amplifier PCB and heatsink were mounted in the top of an HP436a Power Meter chassis. An Arduino Mega mounted vertically immediately behind the front panel LCDs provides control and display functions.
The amplifier front panel has left and right 20×4 standard character LCDs fitted with LCD I2C backpacks from Adafruit, power switch for 12V DC, Standby/Enabled switch, and On Air LED indicator. The 50V DC supply is fused inside the amplifier and switched via a Sparkfun Beefcake relay – 50V DC is removed from the amplifier PCB when in Standby Mode, and applied to the PCB in Enabled mode.
The left LCD displays the heatsink temperature immediately above each of the MRF101 devices. DS18S20 1-wire temperature sensors were fixed to heatsink using thermal glue.
The right LCD displays current amplifier state and band, and the 50V DC PA current in amps.
Upon power up, the amplifier software first checks the status of the Standby/Enabled switch and will not proceed unless the switch is in the Standby position. A flashing warning is displayed if the switch is in the Enabled position. The software then tries to establish a serial link with the transceiver, if a link is not established within 8 seconds, the Watchdog timer will reset the Arduino; this is repeated until the link is established.
Upon establishing the serial link, the amplifier right LCD will display the current band setting. The band information is only used to show the link with the transceiver has been established, but it could be used to switch LPF if they were integrated into the amplifier.
Once the amplifier software has successfully started, a state machine that has three states is continuously executed. The state machine state is controlled by the front panel Standby/Enable switch and PTT commands via the serial link with the transceiver.
Standby
- Amplifier bias disabled
- Amplifier 50V DC removed (off)
- TR Relays set to bypass amplifier
- Fan off
- On Air LED off
Enabled
- Amplifier bias disabled
- Amplifier 50V DC applied (on)
- TR Relays set to place amplifier in-line
- Fan on
- On Air LED off
On Air
- Amplifier bias enabled
- On Air LED on
In normal operation, the amplifier is placed in Enabled mode, and PTT commands transition the amplifier between Enabled and On Air modes. A PTT timeout function is not implemented in the amplifier as the transceiver has a 3 minute PTT timer that will disable the transmitter if PTT is active for more than 3 minutes. The amplifier software uses the ATmega2560 Watchdog timer which will reset the amplifier to an inoperative state in 8 seconds if the software ever hangs.
There are currently no protection mechanisms in the software to shutdown the amplifier in the event of an over drive, over current, or high SWR condition.
I have added the software to the GitHub location if you would like to experiment with it: 150W Amplifier Software
Whenever “tuning” the amplifier for the first time after turning on, or subsequently when switching bands, I ensure drive is set to zero before activating PTT. When PTT is activated with zero drive, I check that the 50V DC idling current is ~200mA before gradually increasing the drive and monitoring RF power level and 50V DC current. RF power should increase linearly as drive is increased. As soon as RF power stops increasing with increased drive, I back off the drive slightly to the maximum power level reached while power was increasing linearly with drive.
I built a Sensor & Control Interface Board to interface the Arduino with a current sensor, various relays, fan control, 50V DC power relay & etc. This board also provides distribution of the 12V DC power. The schematic is shown below. As the board was designed with ExpressPCB tools, I do not have Gerber files; however, I have added the .pcb file for ExpressPCB to the GitHub location.
An ADS115 Breakout Board from Adafruit is used to provide ADC function for the ACS723 current sensor. The specific ACS723 device used was ACS723LLCTR-10AU-T, a 10A DC version from the ACS723 family. I had originally planned to use temperature sensors with analog outputs, but switched to DS18S20 1-wire devices, hence there are 3 spare inputs to the ADS1115. The ADS1115 communicates with the Arduino via the I2C bus.
The remainder of the circuitry is quite standard and uses standard components.
© 2014 – 2021 Rod Gatehouse AD5GH
AD5GH 
Hi Rod.
Thanks for your inspiring website.
Can you help me with a url with info on the (Arduino) control-logic?
73’s Christiaan PA3FUN
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Hi Christiaan,
Thanks for the feedback!
I will post the Arduino code on GitHub and provide a link.
Best regards,
Rod
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Hi Rod.
Any chance You will be able to post the Arduino code&schematics on Github any time soon?
We (three Dutch hams) expect the (bare) amplifiers to be ready end of this week and would love the idea of completing them with adequate protection 🙂
73’s Christiaan PA3FUN
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Hi Christiaan,
I have added some explanation of the Arduino software and control circuitry, and added a link to the software files in the GitHub location.
Best regards,
Rod
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Hello,
Nicely done and I hope no one cannibalizes a working 438!
I believe you have made a mistake in the load line calculation. For any impedance, the RMS power delivered is the square of the voltage swing across the load. In this case the drain swing is twice the DC voltage on the drain. However that is the peak value and not the RMS value which is the peak voltage divided by square root of two. When you square 2 * V / root 2 you get 2V^2, Hence RMS power becomes 2 * Vdc ^2 / RL’
In this schematic the drains to drain impedance (RL’) is 50 ohms, The balun merely changes the unbalanced load to a balanced load. For 50V, the power output is going to be around 100W (2 x 50 ^2) / 50 = 100.
In practice, the RF output will be less because the transistors do not turn on all the way to zero volts when fully saturated. There will be a volt or two depending on the current flowing across the RDS on of the device.
the split DC feed choke does not provide any impedance transformation. It serves to isolate the power supply from the RF. In fact it is also a two way type one combiner so in phase RF created by the overlaping conduction angle bcause of the bias on level appears at the center tap at half of the drain (not drain to drain) impedance and is shunted to ground by the capacitors.
If you were to change the output balun to a 1:4 transformer you would have 300W of RF available before reaching saturation of the devices.
73 de N8WFF
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Hi Mike,
Thanks for visiting and for the feedback! You raise some interesting points for discussion.
Regarding the load line calculation, aren’t you are looking for the optimum RL that deliveries the desired peak power output with a peak voltage swing of 0 to 2xVcc volts on the device drain. With load line calculations, either formula based or graphically, I have always dealt with peak values. Per NXP Application Note AN1526, “RF Power Device Impedances: Practical Considerations”, page 3 formula (1) states: RL = (Vcc – Vrdson)^2/2*Pout, where Pout is the required peak power.
In a push-pull amplifier one device is active while the other device is off (ignoring crossover effects), essentially an open circuit. The optimum RL calculation is applied to the active device, so with Vcc=50 (ignoring RDSon voltage drop) and desired Po=100W, optimum RL = 50V^2/(2×100) = 12.5 ohms.
T2 is 1:4 TLT that on each half cycle transforms the 12.5 ohm optimum RL for each device to a balanced 50 ohms. T3 transforms balanced 50 ohms to unbalanced 50 ohms. There has been a great deal of debate about the function of T2 in push-pull HF amplifier circuits, however, the best explanation I have found is Fig. 12-13(a) and associated explanation on page 375 of Solid State Radio Engineering (1980) by Krauss, Bostian, and Rabb.
In an early version of the amplifier, under sized bypass capacitors on the DC feed to T2 center tap disintegrated as the amplifier power output was increased. These capacitors are critical for providing RF path to ground at T2 center tap. In this configuration, T2 is not performing as an RF choke.
The amplifier produces 150W output with little heating of the T1 and T2 cores, so the impedance matching seems to be in the right ballpark. I have run up to 170 watts without any issues; considering a reasonable value for Vrdson, this is where I would expect Po to start maxing out.
Best regards,
Rod
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